CSDN技术中心 INTEL 汇编指令集

INTEL 汇编指令集
Intel Assemble Instruction Set

CONTENT

Intel 8086 Family ArchitectureInstruction Clock Cycle Calculation8088/8086  Effective Address (EA) CalculationTask State CalculationFLAGS - Intel 8086 Family Flags RegisterMSW - Machine Status Word (286+ only)8086/80186/80286/80386/80486 Instruction SetAAA - Ascii Adjust for AdditionAAD - Ascii Adjust for DivisionAAM - Ascii Adjust for MultiplicationAAS - Ascii Adjust for SubtractionADC - Add With CarryADD - Arithmetic AdditionAND - Logical AndARPL - Adjusted Requested Privilege Level of Selector (286+ PM)BOUND - Array Index Bound Check (80188+)BSF - Bit Scan Forward (386+)BSR - Bit Scan Reverse  (386+)BSWAP - Byte Swap       (486+)BT - Bit Test           (386+)BTC - Bit Test with Compliment (386+)BTR - Bit Test with Reset (386+)BTS - Bit Test and Set  (386+)CALL - Procedure CallCBW - Convert Byte to WordCDQ - Convert Double to Quad (386+)CLC - Clear CarryCLD - Clear Direction FlagCLI - Clear Interrupt Flag (disable)CLTS - Clear Task Switched Flag (286+ privileged)CMC - Complement Carry FlagCMP - CompareCMPS - Compare String (Byte, Word or Doubleword)CMPXCHG - Compare and ExchangeCWD - Convert Word to DoublewordCWDE - Convert Word to Extended Doubleword (386+)DAA - Decimal Adjust for AdditionDAS - Decimal Adjust for SubtractionDEC - DecrementDIV - DivideENTER - Make Stack Frame (80188+)ESC - EscapeHLT - Halt CPUIDIV - Signed Integer DivisionIMUL - Signed MultiplyIN - Input Byte or Word From PortINC - IncrementINS - Input String from Port (80188+)INT - InterruptINTO - Interrupt on OverflowINVD - Invalidate Cache  (486+)INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+)IRET/IRETD - Interrupt ReturnJxx - Jump Instructions TableJCXZ/JECXZ - Jump if Register (E)CX is ZeroJMP - Unconditional JumpLAHF - Load Register AH From FlagsLAR - Load Access Rights (286+ protected)LDS - Load Pointer Using DSLEA - Load Effective AddressLEAVE - Restore Stack for Procedure Exit (80188+)LES - Load Pointer Using ESLFS - Load Pointer Using FS (386+)LGDT - Load Global Descriptor Table (286+ privileged)LIDT - Load Interrupt Descriptor Table (286+ privileged)LGS - Load Pointer Using GS (386+)LLDT - Load Local Descriptor Table (286+ privileged)LMSW - Load Machine Status Word (286+ privileged)LOCK - Lock BusLODS - Load String (Byte, Word or Double)LOOP - Decrement CX and Loop if CX Not ZeroLOOPE/LOOPZ - Loop While Equal / Loop While ZeroLOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not EqualLSL - Load Segment Limit (286+ protected)LSS - Load Pointer Using SS (386+)LTR - Load Task Register (286+ privileged)MOV - Move Byte or WordMOVS - Move String (Byte or Word)MOVSX - Move with Sign Extend (386+)MOVZX - Move with Zero Extend (386+)MUL - Unsigned MultiplyNEG - Two's Complement NegationNOP - No Operation (90h)NOT - One's Compliment Negation (Logical NOT)OR - Inclusive Logical OROUT - Output Data to PortOUTS - Output String to Port (80188+)POP - Pop Word off StackPOPA/POPAD - Pop All Registers onto Stack (80188+)POPF/POPFD - Pop Flags off StackPUSH - Push Word onto StackPUSHA/PUSHAD - Push All Registers onto Stack (80188+)PUSHF/PUSHFD - Push Flags onto StackRCL - Rotate Through Carry LeftRCR - Rotate Through Carry RightREP - Repeat String OperationREPE/REPZ - Repeat Equal / Repeat ZeroREPNE/REPNZ - Repeat Not Equal / Repeat Not ZeroRET/RETF - Return From ProcedureROL - Rotate LeftROR - Rotate RightSAHF - Store AH Register into FLAGSSAL/SHL - Shift Arithmetic Left / Shift Logical LeftSAR - Shift Arithmetic RightSBB - Subtract with Borrow/CarrySCAS - Scan String  (Byte, Word or Doubleword)SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+)SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+)SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+)SETE/SETZ - Set if Equal / Set if Zero (386+)SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+)SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+)SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+)SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+)SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+)SETS - Set if Signed (386+)SETNS - Set if Not Signed (386+)SETC - Set if Carry (386+)SETNC - Set if Not Carry (386+)SETO - Set if Overflow (386+)SETNO - Set if Not Overflow (386+)SETP/SETPE - Set if Parity / Set if Parity Even  (386+)SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+)SGDT - Store Global Descriptor Table (286+ privileged)SIDT - Store Interrupt Descriptor Table (286+ privileged)SHL - Shift Logical LeftSHR - Shift Logical RightSHLD/SHRD - Double Precision Shift (386+)SLDT - Store Local Descriptor Table (286+ privileged)SMSW - Store Machine Status Word (286+ privileged)STC - Set CarrySTD - Set Direction FlagSTI - Set Interrupt Flag  (Enable Interrupts)STOS - Store String  (Byte, Word or Doubleword)STR - Store Task Register (286+ privileged)SUB - SubtractTEST - Test For Bit PatternVERR - Verify Read (286+ protected)VERW - Verify Write (286+ protected)WAIT/FWAIT - Event WaitWBINVD - Write-Back and Invalidate Cache (486+)XCHG - ExchangeXLAT/XLATB - TranslateXOR - Exclusive OR

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Intel 8086 Family ArchitectureGeneral Purpose Registers               Segment RegistersAH/AL  AX  (EAX)  Accumulator            CS     Code SegmentBH/BL  BX  (EBX)  Base                   DS     Data SegmentCH/CL  CX  (ECX)  Counter                SS     Stack SegmentDH/DL  DX  (EDX)  Data                   ES     Extra Segment(FS)    386 and newer(Exx) indicates 386+ 32 bit register    (GS)    386 and newerPointer Registers                       Stack RegistersSI (ESI)  Source Index                  SP (ESP)  Stack PointerDI (EDI)  Destination Index             BP (EBP)  Base PointerIP        Instruction PointerStatus RegistersFLAGS Status Flags   (see FLAGS)Special Registers (386+ only)CR0     Control Register 0        DR0    Debug Register 0CR2     Control Register 2        DR1    Debug Register 1CR3     Control Register 3        DR2    Debug Register 2DR3    Debug Register 3TR4     Test Register 4           DR6    Debug Register 6TR5     Test Register 5           DR7    Debug Register 7TR6     Test Register 6TR7     Test Register 7Register          Default Segment    Valid OverridesBP                      SS              DS, ES, CSSI or DI                DS              ES, SS, CSDI strings              ES              NoneSI strings              DS              ES, SS, CS- see  CPU   DETECTING  Instruction TimingInstruction Clock Cycle CalculationSome instructions require additional clock cycles due to a "NextInstruction Component" identified by a "+m" in the instructionclock cycle listings.  This is due to the prefetch queue beingpurge on a control transfers.   Below is the general rule forcalculating "m":88/86 not applicable286  "m" is the number of bytes in the next instruction386  "m" is the number of components in the next instruction(the instruction coding (each byte), plus the data andthe displacement are all considered components)8088/8086  Effective Address (EA) CalculationDescription                            Clock CyclesDisplacement                                            6Base or Index (BX,BP,SI,DI)                             5Displacement+(Base or Index)                            9Base+Index (BP+DI,BX+SI)                                7Base+Index (BP+SI,BX+DI)                                8Base+Index+Displacement (BP+DI,BX+SI)                  11Base+Index+Displacement (BP+SI+disp,BX+DI+disp)        12- add 4 cycles for word operands at odd addresses- add 2 cycles for segment override- 80188/80186 timings differ from those of the 8088/8086/80286Task State Calculation"TS" is defined as switching from VM/486 or 80286 TSS to one ofthe following:+---------------------------------------+|               New Task                |+-------+-------+-------+-------+-------++---------------+486 TSS|486 TSS|386 TSS|386 TSS|286 TSS||   Old Task    | (VM=0)| (VM=1)| (VM=0)| (VM=1)|       |+---------------+-------+-------+-------+-------+-------+386 TSS (VM=0)  |       |       |  309  |  226  |  282  |+-------+-------+-------+-------+-------+386 TSS (VM=1)  |       |       |  314  |  231  |  287  |+-------+-------+-------+-------+-------+386 CPU/286 TSS |       |       |  307  |  224  |  280  |+-------+-------+-------+-------+-------+486 CPU/286 TSS |  199  |  177  |       |       |  180  |+---------------------------------------+Miscellaneous- all timings are for best case and do not take into account waitstates, instruction alignment, the state of the prefetch queue,DMA refresh cycles, cache hits/misses or exception processing.- to convert clocks to nanoseconds divide one microsecond by theprocessor speed in MegaHertz:(1000MHz/(n MHz)) = X nanoseconds- see   8086 ArchitectureFLAGS - Intel 8086 Family Flags Register|11|10|F|E|D|C|B|A|9|8|7|6|5|4|3|2|1|0||  | | | | | | | | | | | | | | | | +---  CF Carry Flag|  | | | | | | | | | | | | | | | +---  1|  | | | | | | | | | | | | | | +---  PF Parity Flag|  | | | | | | | | | | | | | +---  0|  | | | | | | | | | | | | +---  AF Auxiliary Flag|  | | | | | | | | | | | +---  0|  | | | | | | | | | | +---  ZF Zero Flag|  | | | | | | | | | +---  SF Sign Flag|  | | | | | | | | +---  TF Trap Flag  (Single Step)|  | | | | | | | +---  IF Interrupt Flag|  | | | | | | +---  DF Direction Flag|  | | | | | +---  OF Overflow flag|  | | | +-----  IOPL I/O Privilege Level  (286+ only)|  | | +-----  NT Nested Task Flag  (286+ only)|  | +-----  0|  +-----  RF Resume Flag (386+ only)+------  VM  Virtual Mode Flag (386+ only)- see   PUSHF  POPF  STI  CLI  STD  CLDMSW - Machine Status Word (286+ only)|31|30-5|4|3|2|1|0|  Machine Status Word|   |  | | | | +---- Protection Enable (PE)|   |  | | | +----- Math Present (MP)|   |  | | +------ Emulation (EM)|   |  | +------- Task Switched (TS)|   |  +-------- Extension Type (ET)|   +---------- Reserved+------------- Paging (PG)Bit 0   PE      Protection Enable, switches processor betweenprotected and real modeBit 1   MP      Math Present, controls function of the WAITinstructionBit 2   EM      Emulation, indicates whether coprocessor functionsare to be emulatedBit 3   TS      Task Switched, set and interrogated by coprocessoron task switches and when interpretting coprocessorinstructionsBit 4   ET      Extension Type, indicates type of coprocessor insystemBits 5-30       Reservedbit 31  PG      Paging, indicates whether the processor uses pagetables to translate linear addresses to physicaladdresses- see   SMSW  LMSW8086/80186/80286/80386/80486 Instruction SetAAA - Ascii Adjust for AdditionUsage:  AAAModifies flags: AF CF (OF,PF,SF,ZF undefined)Changes contents of AL to valid unpacked decimal.  The high ordernibble is zeroed.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              8     3     4     3             1AAD - Ascii Adjust for DivisionUsage:  AADModifies flags: SF ZF PF (AF,CF,OF undefined)Used before dividing unpacked decimal numbers.   Multiplies AH by10 and the adds result into AL.  Sets AH to zero.  This instructionis also known to have an undocumented behavior.AL := 10*AH+ALAH := 0Clocks                 SizeOperands         808x  286   386   486          Bytesnone              60    14    19    14            2AAM - Ascii Adjust for MultiplicationUsage:  AAMModifies flags: PF SF ZF (AF,CF,OF undefined)AH := AL / 10AL := AL mod 10Used after multiplication of two unpacked decimal numbers, thisinstruction adjusts an unpacked decimal number.  The high ordernibble of each byte must be zeroed before using this instruction.This instruction is also known to have an undocumented behavior.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              83    16    17    15            2AAS - Ascii Adjust for SubtractionUsage:  AASModifies flags: AF CF (OF,PF,SF,ZF undefined)Corrects result of a previous unpacked decimal subtraction in AL.High order nibble is zeroed.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              8     3     4     3             1ADC - Add With CarryUsage:  ADC     dest,srcModifies flags: AF CF OF SF PF ZFSums two binary operands placing the result in the destination.If CF is set, a 1 is added to the destination.Clocks                  SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     7     3            2-4  (W88=24+EA)reg,mem          9+EA   7     6     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       17+EA   7     7     3            3-6  (W88=23+EA)accum,immed       4     3     2     1            2-3ADD - Arithmetic AdditionUsage:  ADD     dest,srcModifies flags: AF CF OF PF SF ZFAdds "src" to "dest" and replacing the original contents of "dest".Both operands are binary.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     7     3            2-4  (W88=24+EA)reg,mem          9+EA   7     6     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       17+EA   7     7     3            3-6  (W88=23+EA)accum,immed       4     3     2     1            2-3AND - Logical AndUsage:  AND     dest,srcModifies flags: CF OF PF SF ZF (AF undefined)Performs a logical AND of the two operands replacing the destinationwith the result.Clocks                  SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     7     3            2-4  (W88=24+EA)reg,mem          9+EA   7     6     1            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       17+EA   7     7     3            3-6  (W88=23+EA)accum,immed       4     3     2     1            2-3ARPL - Adjusted Requested Privilege Level of Selector (286+ PM)Usage:  ARPL    dest,src(286+ protected mode)Modifies flags: ZFCompares the RPL bits of "dest" against "src".  If the RPL bitsof "dest" are less than "src", the destination RPL bits are setequal to the source RPL bits and the Zero Flag is set.  Otherwisethe Zero Flag is cleared.Clocks                  SizeOperands         808x  286   386   486          Bytesreg,reg           -     10    20    9             2mem,reg           -     11    21    9             4BOUND - Array Index Bound Check (80188+)Usage:  BOUND   src,limitModifies flags: NoneArray index in source register is checked against upper and lowerbounds in memory source.  The first word located at "limit" isthe lower boundary and the word at "limit+2" is the upper array bound.Interrupt 5 occurs if the source value is less than or higher thanthe source.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,mem32       -   nj=13 nj=10   7             2reg32,mem64       -   nj=13 nj=10   7             2- nj = no jump takenBSF - Bit Scan Forward (386+)Usage:  BSF     dest,srcModifies flags: ZFScans source operand for first bit set.  Sets ZF if a bit is foundset and loads the destination with an index to first set bit.  ClearsZF is no bits are found set.  BSF scans forward across bit pattern(0-n) while BSR scans in reverse (n-0).Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           -     -   10+3n  6-42           3reg,mem           -     -   10+3n  7-43          3-7reg32,reg32       -     -   10+3n  6-42          3-7reg32,mem32       -     -   10+3n  7-43          3-7BSR - Bit Scan Reverse  (386+)Usage:  BSR     dest,srcModifies flags: ZFScans source operand for first bit set.  Sets ZF if a bit is foundset and loads the destination with an index to first set bit.  ClearsZF is no bits are found set.  BSF scans forward across bit pattern(0-n) while BSR scans in reverse (n-0).Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           -     -   10+3n  6-103          3reg,mem           -     -   10+3n  7-104         3-7reg32,reg32       -     -   10+3n  6-103         3-7reg32,mem32       -     -   10+3n  7-104         3-7BSWAP - Byte Swap       (486+)Usage:  BSWAP   reg32Modifies flags: noneChanges the byte order of a 32 bit register from big endian tolittle endian or vice versa.   Result left in destination registeris undefined if the operand is a 16 bit register.Clocks                 SizeOperands         808x  286   386   486          Bytesreg32             -     -     -     1             2BT - Bit Test           (386+)Usage:  BT      dest,srcModifies flags: CFThe destination bit indexed by the source value is copied into theCarry Flag.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,immed8      -     -     3     3            4-8mem16,immed8      -     -     6     6            4-8reg16,reg16       -     -     3     3            3-7mem16,reg16       -     -     12    12           3-7BTC - Bit Test with Compliment (386+)Usage:  BTC     dest,srcModifies flags: CFThe destination bit indexed by the source value is copied into theCarry Flag after being complimented (inverted).Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,immed8      -     -     6     6            4-8mem16,immed8      -     -     8     8            4-8reg16,reg16       -     -     6     6            3-7mem16,reg16       -     -     13    13           3-7BTR - Bit Test with Reset (386+)Usage:  BTR     dest,srcModifies flags: CFThe destination bit indexed by the source value is copied into theCarry Flag and then cleared in the destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,immed8      -     -     6     6            4-8mem16,immed8      -     -     8     8            4-8reg16,reg16       -     -     6     6            3-7mem16,reg16       -     -     13    13           3-7BTS - Bit Test and Set  (386+)Usage:  BTS     dest,srcModifies flags: CFThe destination bit indexed by the source value is copied into theCarry Flag and then set in the destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,immed8      -     -     6     6            4-8mem16,immed8      -     -     8     8            4-8reg16,reg16       -     -     6     6            3-7mem16,reg16       -     -     13    13           3-7CALL - Procedure CallUsage:  CALL    destinationModifies flags: NonePushes Instruction Pointer (and Code Segment for far calls) ontostack and loads Instruction Pointer with the address of proc-name.Code continues with execution at CS:IP.ClocksOperands                     808x   286     386     486rel16 (near, IP relative)                19     7      7+m      3rel32 (near, IP relative)                -      -      7+m      3reg16 (near, register indirect)          16     7      7+m      5reg32 (near, register indirect)          -      -      7+m      5mem16 (near, memory indirect)          21+EA    11    10+m      5mem32 (near, memory indirect)            -      -     10+m      5ptr16:16 (far, full ptr supplied)        28     13    17+m      18ptr16:32 (far, full ptr supplied)        -      -     17+m      18ptr16:16 (far, ptr supplied, prot. mode) -      26    34+m      20ptr16:32 (far, ptr supplied, prot. mode) -      -     34+m      20m16:16 (far, indirect)                 37+EA    16    22+m      17m16:32 (far, indirect)                   -      -     22+m      17m16:16 (far, indirect, prot. mode)       -      29    38+m      20m16:32 (far, indirect, prot. mode)       -      -     38+m      20ptr16:16 (task, via TSS or task gate)    -     177     TS     37+TSm16:16 (task, via TSS or task gate)      -   180/185  5+TS    37+TSm16:32 (task)                            -      -      TS     37+TSm16:32 (task)                            -      -     5+TS    37+TSptr16:16 (gate, same privilege)          -      41    52+m      35ptr16:32 (gate, same privilege)          -      -     52+m      35m16:16 (gate, same privilege)            -      44    56+m      35m16:32 (gate, same privilege)            -      -     56+m      35ptr16:16 (gate, more priv, no parm)      -      82    86+m      69ptr16:32 (gate, more priv, no parm)      -      -     86+m      69m16:16 (gate, more priv, no parm)        -      83    90+m      69m16:32 (gate, more priv, no parm)        -      -     90+m      69ptr16:16 (gate, more priv, x parms)      -    86+4x  94+4x+m  77+4xptr16:32 (gate, more priv, x parms)      -      -    94+4x+m  77+4xm16:16 (gate, more priv, x parms)        -    90+4x  98+4x+m  77+4xm16:32 (gate, more priv, x parms)        -      -    98+4x+m  77+4xCBW - Convert Byte to WordUsage:  CBWModifies flags: NoneConverts byte in AL to word Value in AX by extending sign of ALthroughout register AH.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     3     3             1CDQ - Convert Double to Quad (386+)Usage:  CDQModifies flags: NoneConverts signed DWORD in EAX to a signed quad word in EDX:EAX byextending the high order bit of EAX throughout EDXClocks                 SizeOperands         808x  286   386   486          Bytesnone              -     -     2     3             1CLC - Clear CarryUsage:  CLCModifies flags: CFClears the Carry Flag.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2     2             1CLD - Clear Direction FlagUsage:  CLDModifies flags: DFClears the Direction Flag causing string instructions to incrementthe SI and DI index registers.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2     2             1CLI - Clear Interrupt Flag (disable)Usage:  CLIModifies flags: IFDisables the maskable hardware interrupts by clearing the Interruptflag.  NMI's and software interrupts are not inhibited.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     3     5             1CLTS - Clear Task Switched Flag (286+ privileged)Usage:  CLTSModifies flags: NoneClears the Task Switched Flag in the Machine Status Register.  Thisis a privileged operation and is generally used only by operatingsystem code.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              -     2     5     7             2CMC - Complement Carry FlagUsage:  CMCModifies flags: CFToggles (inverts) the Carry FlagClocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2     2             1CMP - CompareUsage:  CMP     dest,srcModifies flags: AF CF OF PF SF ZFSubtracts source from destination and updates the flags but doesnot save result.  Flags can subsequently be checked for conditions.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg          9+EA   7     5     2            2-4  (W88=13+EA)reg,mem          9+EA   6     6     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       10+EA   6     5     2            3-6  (W88=14+EA)accum,immed       4     3     2     1            2-3CMPS - Compare String (Byte, Word or Doubleword)Usage:  CMPS    dest,srcCMPSBCMPSWCMPSD   (386+)Modifies flags: AF CF OF PF SF ZFSubtracts destination value from source without saving results.Updates flags based on the subtraction and  the index registers(E)SI and (E)DI are incremented or decremented depending on thestate of the Direction Flag.  CMPSB inc/decrements the indexregisters by 1, CMPSW inc/decrements by 2, while CMPSD incrementsor decrements by 4.  The REP prefixes can be used to processentire data items.Clocks                 SizeOperands         808x  286   386   486          Bytesdest,src          22    8     10    8             1  (W88=30)CMPXCHG - Compare and ExchangeUsage:  CMPXCHG dest,src  (486+)Modifies flags: AF CF OF PF SF ZFCompares the accumulator (8-32 bits) with "dest".  If equal the"dest" is loaded with "src", otherwise the accumulator is loadedwith "dest".Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           -     -     -     6             2mem,reg           -     -     -     7             2- add 3 clocks if the "mem,reg" comparison failsCWD - Convert Word to DoublewordUsage:  CWDModifies flags: NoneExtends sign of word in register AX throughout register DX forminga doubleword quantity in DX:AX.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              5     2     2     3             1CWDE - Convert Word to Extended Doubleword (386+)Usage:  CWDEModifies flags: NoneConverts a signed word in AX to a signed doubleword in EAX byextending the sign bit of AX throughout EAX.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              -     -     3     3             1DAA - Decimal Adjust for AdditionUsage:  DAAModifies flags: AF CF PF SF ZF (OF undefined)Corrects result (in AL) of a previous BCD addition operation.Contents of AL are changed to a pair of packed decimal digits.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              4     3     4     2             1DAS - Decimal Adjust for SubtractionUsage:  DASModifies flags: AF CF PF SF ZF (OF undefined)Corrects result (in AL) of a previous BCD subtraction operation.Contents of AL are changed to a pair of packed decimal digits.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              4     3     4     2             1DEC - DecrementUsage:  DEC     destModifies flags: AF OF PF SF ZFUnsigned binary subtraction of one from the destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              3     2     2     1             2mem             15+EA   7     6     3            2-4reg16/32          3     2     2     1             1DIV - DivideUsage:  DIV     srcModifies flags: (AF,CF,OF,PF,SF,ZF undefined)Unsigned binary division of accumulator by source.  If the sourcedivisor is a byte value then AX is divided by "src" and the quotientis placed in AL and the remainder in AH.  If source operand is a wordvalue, then DX:AX is divided by "src" and the quotient is stored in AXand the remainder in DX.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8             80-90  14    14    16            2reg16           144-162 22    22    24            2reg32              -    -     38    40            2mem8        (86-96)+EA  17    17    16           2-4mem16     (150-168)+EA  25    25    24           2-4  (W88=158-176+EA)mem32              -    -     41    40           2-4ENTER - Make Stack Frame  (80188+)Usage:  ENTER   locals,levelModifies flags: NoneModifies stack for entry to procedure for high level language.Operand "locals" specifies the amount of storage to be allocatedon the stack.   "Level" specifies the nesting level of the routine.Paired with the LEAVE instruction, this is an efficient method ofentry and exit to procedures.Clocks                     SizeOperands         808x    286       386       486        Bytesimmed16,0         -       11       10         14          4immed16,1         -       15       12         17          4immed16,immed8    -   12+4(n-1) 15+4(n-1)    17+3n        4ESC - EscapeUsage:  ESC     immed,srcModifies flags: NoneProvides access to the data bus for other resident processors.The CPU treats it as a NOP but places memory operand on bus.Clocks                 SizeOperands         808x  286   386   486          Bytesimmed,reg         2   9-20    ?                   2immed,mem         2   9-20    ?                  2-4HLT - Halt CPUUsage:   HLTModifies flags: NoneHalts CPU until RESET line is activated, NMI or maskable interruptreceived.  The CPU becomes dormant but retains the current CS:IPfor later restart.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     5     4             1IDIV - Signed Integer DivisionUsage:   IDIV   srcModifies flags: (AF,CF,OF,PF,SF,ZF undefined)Signed binary division of accumulator by source.  If source is abyte value, AX is divided by "src" and the quotient is stored inAL and the remainder in AH.  If source is a word value, DX:AX isdivided by "src", and the quotient is stored in AL and theremainder in DX.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8          101-112   17    19    19            2reg16         165-184   25    27    27            2reg32            -      -     43    43            2mem8     (107-118)+EA   20    22    20           2-4mem16    (171-190)+EA   38    30    28           2-4  (W88=175-194)mem32            -      -     46    44           2-4IMUL - Signed MultiplyUsage:  IMUL    srcIMUL    src,immed        (286+)IMUL    dest,src,immed8  (286+)IMUL    dest,src         (386+)Modifies flags: CF OF (AF,PF,SF,ZF undefined)Signed multiplication of accumulator by "src" with result placedin the accumulator.  If the source operand is a byte value, itis multiplied by AL and the result stored in AX.  If the sourceoperand is a word value it is multiplied by AX and the result isstored in DX:AX.  Other variations of this instruction allowspecification of source and destination registers as well as athird immediate factor.Clocks                SizeOperands         808x   286   386   486         Bytesreg8             80-98   13   9-14  13-18         2reg16           128-154  21   9-22  13-26         2reg32              -     -    9-38  12-42         2mem8             86-104  16  12-17  13-18        2-4mem16           134-160  24  12-25  13-26        2-4mem32              -     -   12-41  13-42        2-4reg16,reg16        -     -    9-22  13-26        3-5reg32,reg32        -     -    9-38  13-42        3-5reg16,mem16        -     -   12-25  13-26        3-5reg32,mem32        -     -   12-41  13-42        3-5reg16,immed        -     21   9-22  13-26         3reg32,immed        -     21   9-38  13-42        3-6reg16,reg16,immed  -     2    9-22  13-26        3-6reg32,reg32,immed  -     21   9-38  13-42        3-6reg16,mem16,immed  -     24  12-25  13-26        3-6reg32,mem32,immed  -     24  12-41  13-42        3-6IN - Input Byte or Word From PortUsage:  IN      accum,portModifies flags: NoneA byte, word or dword is read from "port" and placed in AL, AX orEAX respectively.  If the port number is in the range of 0-255it can be specified as an immediate, otherwise the port numbermust be specified in DX.  Valid port ranges on the PC are 0-1024,though values through 65535 may be specified and recognized bythird party vendors and PS/2's.Clocks                 SizeOperands         808x  286   386    486         Bytesaccum,immed8    10/14   5     12     14           2accum,immed8 (PM)            6/26  8/28/27        2accum,DX         8/12   5     13     14           1accum,DX (PM)                7/27  8/28/27        1- 386+ protected mode timings depend on privilege levels.first number is the timing if:    CPL ?IOPLsecond number is the timing if:   CPL > IOPL or in VM 86 mode (386)CPL ?IOPL  (486)third number is the timing when:    virtual mode on 486 processor- 486 virtual mode always requires 27 cyclesINC - IncrementUsage:  INC     destModifies flags: AF OF PF SF ZFAdds one to destination unsigned binary operand.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              3     2     2     1             2reg16             3     2     2     1             1reg32             3     2     2     1             1mem             15+EA   7     6     3            2-4  (W88=23+EA)INS - Input String from Port  (80188+)Usage:  INS     dest,portINSBINSWINSD    (386+)Modifies flags: NoneLoads data from port to the destination ES:(E)DI  (even if adestination operand is supplied).  (E)DI is adjusted by the sizeof the operand and increased if the Direction Flag is cleared anddecreased if the Direction Flag is set.  For INSB, INSW, INSD nooperands are allowed and the size is determined by the mnemonic.Clocks                 SizeOperands         808x  286   386    486         Bytesdest,port         -     5     15     17           1dest,port (PM)    -     5    9/29 10/32/30        1none              -     5     15     17           1none (PM)         -     5    9/29 10/32/30        1- 386+ protected mode timings depend on privilege levels.first number is the timing if:    CPL ?IOPLsecond number is the timing if:   CPL > IOPLthird number is the timing if:    virtual mode on 486 processorINT - InterruptUsage:  INT     numModifies flags: TF IFInitiates a software interrupt by pushing the flags, clearing theTrap and Interrupt Flags, pushing CS followed by IP and loadingCS:IP with the value found in the interrupt vector table.  Executionthen begins at the location addressed by the new CS:IPClocks           SizeOperands                    808x  286   386   486   Bytes3 (constant)                          52/72  23+m   33    26     23 (prot. mode, same priv.)              -    40+m   59    44     23 (prot. mode, more priv.)              -    78+m   99    71     23 (from VM86 to PL 0)                   -     -    119    82     23 (prot. mode via task gate)            -   167+m   TS  37+TS    2immed8                                51/71  23+m   37    30     1immed8 (prot. mode, same priv.)         -    40+m   59    44     1immed8 (prot. mode, more priv.)         -    78+m   99    71     1immed8 (from VM86 to PL 0)              -     -    119    86     1immed8 (prot. mode, via task gate)      -   167+m   TS  37+TS    1INTO - Interrupt on OverflowUsage:  INTOModifies flags: IF TFIf the Overflow Flag is set this instruction generates an INT 4which causes the code addressed by 0000:0010 to be executed.Clocks           SizeOperands                808x    286   386   486    Bytesnone: jump             53/73   24+m    35    28      1no jump            4       3     3     3(prot. mode, same priv.) -       -     59    46      1(prot. mode, more priv.) -       -     99    73      1(from VM86 to PL 0)      -       -    119    84      1(prot. mode, via task gate)      -     TS  39+TS     1INVD - Invalidate Cache  (486+)Usage:  INVDModifies flags: noneFlushes CPU internal cache.  Issues special function bus cyclewhich indicates to flush external caches.   Data in write-backexternal caches is lost.Clocks                SizeOperands         808x   286   386   486         Bytesnone              -      -     -     4            2INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+)Usage:  INVLPGModifies flags: noneInvalidates a single page table entry in the TranslationLook-Aside Buffer.  Intel warns that this instruction may beimplemented differently on future processors.Clocks                SizeOperands         808x   286   386   486         Bytesnone              -      -     -     12           2- timing is for TLB entry hit only.IRET/IRETD - Interrupt ReturnUsage:  IRETIRETD  (386+)Modifies flags: AF CF DF IF PF SF TF ZFReturns control to point of interruption by popping IP, CSand then the Flags from the stack and continues execution atthis location.  CPU exception interrupts will return to theinstruction that cause the exception because the CS:IP placedon the stack during the interrupt is the address of the offendinginstruction.Clocks                 SizeOperands            808x   286   386   486          Bytesiret                       32/44  17+m    22    15            1iret  (prot. mode)           -    31+m    38    15            1iret  (to less privilege)    -    55+m    82    36            1iret  (different task, NT=1) -   169+m    TS  TS+32           1iretd                        -      -   22/38   15            1iretd (to less privilege)    -      -     82    36            1iretd (to VM86 mode)         -      -     60    15            1iretd (different task, NT=1) -      -     TS  TS+32           1- 386 timings are listed as real-mode/protected-modeJxx - Jump Instructions TableMnemonic              Meaning                    Jump ConditionJA     Jump if Above                         CF=0 and ZF=0JAE    Jump if Above or Equal                CF=0JB     Jump if Below                         CF=1JBE    Jump if Below or Equal                CF=1 or ZF=1JC     Jump if Carry                         CF=1JCXZ   Jump if CX Zero                       CX=0JE     Jump if Equal                         ZF=1JG     Jump if Greater (signed)              ZF=0 and SF=OFJGE    Jump if Greater or Equal (signed)     SF=OFJL     Jump if Less (signed)                 SF != OFJLE    Jump if Less or Equal (signed)        ZF=1 or SF != OFJMP    Unconditional Jump                    unconditionalJNA    Jump if Not Above                     CF=1 or ZF=1JNAE   Jump if Not Above or Equal            CF=1JNB    Jump if Not Below                     CF=0JNBE   Jump if Not Below or Equal            CF=0 and ZF=0JNC    Jump if Not Carry                     CF=0JNE    Jump if Not Equal                     ZF=0JNG    Jump if Not Greater (signed)          ZF=1 or SF != OFJNGE   Jump if Not Greater or Equal (signed) SF != OFJNL    Jump if Not Less (signed)             SF=OFJNLE   Jump if Not Less or Equal (signed)    ZF=0 and SF=OFJNO    Jump if Not Overflow (signed)         OF=0JNP    Jump if No Parity                     PF=0JNS    Jump if Not Signed (signed)           SF=0JNZ    Jump if Not Zero                      ZF=0JO     Jump if Overflow (signed)             OF=1JP     Jump if Parity                        PF=1JPE    Jump if Parity Even                   PF=1JPO    Jump if Parity Odd                    PF=0JS     Jump if Signed (signed)               SF=1JZ     Jump if Zero                          ZF=1Clocks                 SizeOperands         808x  286   386   486          BytesJx: jump          16   7+m   7+m    3             2no jump        4    3     3     1Jx  near-label     -    -    7+m    3             4no jump        -    -     3     1- It's a good programming practice to organize code so theexpected case is executed without a jump since the actualjump takes longer to execute than falling through the test.- see   JCXZ  and  JMP  for their respective timingsJCXZ/JECXZ - Jump if Register (E)CX is ZeroUsage:  JCXZ    labelJECXZ   label  (386+)Modifies flags: NoneCauses execution to branch to "label" if register CX is zero.  Usesunsigned comparision.Clocks                 SizeOperands         808x  286   386   486          Byteslabel:  jump      18   8+m   9+m    8             2no jump    6    4     5     5JMP - Unconditional JumpUsage:  JMP     targetModifies flags: NoneUnconditionally transfers control to "label".  Jumps by defaultare within -32768 to 32767 bytes from the instruction followingthe jump.  NEAR and SHORT jumps cause the IP to be updated while FARjumps cause CS and IP to be updated.ClocksOperands                     808x  286    386   486rel8  (relative)                        15    7+m    7+m    3rel16 (relative)                        15    7+m    7+m    3rel32 (relative)                         -     -     7+m    3reg16 (near, register indirect)         11    7+m    7+m    5reg32 (near, register indirect)          -     -     7+m    5mem16 (near, mem indirect)             18+EA  11+m  10+m    5mem32 (near, mem indirect)             24+EA  15+m  10+m    5ptr16:16 (far, dword immed)              -     -    12+m    17ptr16:16 (far, PM dword immed)           -     -    27+m    19ptr16:16 (call gate, same priv.)         -    38+m  45+m    32ptr16:16 (via TSS)                       -   175+m   TS   42+TSptr16:16 (via task gate)                 -   180+m   TS   43+TSmem16:16 (far, indirect)                 -     -    43+m    13mem16:16 (far, PM indirect)              -     -    31+m    18mem16:16 (call gate, same priv.)         -    41+m  49+m    31mem16:16 (via TSS)                       -   178+m  5+TS  41+TSmem16:16 (via task gate)                 -   183+m  5+TS  42+TSptr16:32 (far, 6 byte immed)             -     -    12+m    13ptr16:32 (far, PM 6 byte immed)          -     -    27+m    18ptr16:32 (call gate, same priv.)         -     -    45+m    31ptr16:32 (via TSS)                       -     -     TS   42+TSptr16:32 (via task state)                -     -     TS   43+TSm16:32 (far, address at dword)           -     -    43+m    13m16:32 (far, address at dword)           -     -    31+m    18m16:32 (call gate, same priv.)           -     -    49+m    31m16:32 (via TSS)                         -     -    5+TS  41+TSm16:32 (via task state)                  -     -    5+TS  42+TSLAHF - Load Register AH From FlagsUsage:  LAHFModifies flags: NoneCopies bits 0-7 of the flags register into AH.  This includes flagsAF, CF, PF, SF and ZF other bits are undefined.AH := SF ZF xx AF xx PF xx CFClocks                 SizeOperands         808x  286   386   486          Bytesnone              4     2     2     3             1LAR - Load Access Rights (286+ protected)Usage:  LAR     dest,srcModifies flags: ZFThe high byte of the of the destination register is overwritten bythe value of the access rights byte and the low order byte is zeroeddepending on the selection in the source operand.  The Zero Flag isset if the load operation is successful.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,reg16       -     14    15    11            3reg32,reg32       -     -     15    11            3reg16,mem16       -     16    16    11           3-7reg32,mem32       -     -     16    11           3-7LDS - Load Pointer Using DSUsage:  LDS     dest,srcModifies flags: NoneLoads 32-bit pointer from memory source to destination registerand DS.  The offset is placed in the destination register and thesegment is placed in DS.  To use this instruction the word at thelower memory address must contain the offset and the word at thehigher address must contain the segment.  This simplifies the loadingof far pointers from the stack and the interrupt vector table.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,mem32     16+EA   7     7     6            2-4reg,mem (PM)      -     -     22    12           5-7LEA - Load Effective AddressUsage:  LEA     dest,srcModifies flags: NoneTransfers offset address of "src" to the destination register.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,mem          2+EA   3     2     1            2-4- the MOV instruction can often save clock cycles when used inplace of LEA on 8088 processorsLEAVE - Restore Stack for Procedure Exit (80188+)Usage:  LEAVEModifies flags: NoneReleases the local variables created by the previous ENTERinstruction by restoring SP and BP to their condition beforethe procedure stack frame was initialized.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              -     5     4     5             1LES - Load Pointer Using ESUsage:  LES     dest,srcModifies flags: NoneLoads 32-bit pointer from memory source to destination registerand ES.  The offset is placed in the destination register and thesegment is placed in ES.  To use this instruction the word at thelower memory address must contain the offset and the word at thehigher address must contain the segment.  This simplifies the loadingof far pointers from the stack and the interrupt vector table.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,mem         16+EA   7     7     6            2-4  (W88=24+EA)reg,mem (PM)      -     -     22    12           5-7LFS - Load Pointer Using FS (386+)Usage:  LFS     dest,srcModifies flags: NoneLoads 32-bit pointer from memory source to destination registerand FS.  The offset is placed in the destination register and thesegment is placed in FS.  To use this instruction the word at thelower memory address must contain the offset and the word at thehigher address must contain the segment.  This simplifies the loadingof far pointers from the stack and the interrupt vector table.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,mem           -     -     7     6            5-7reg,mem (PM)      -     -     22    12           5-7LGDT - Load Global Descriptor Table (286+ privileged)Usage:  LGDT    srcModifies flags: NoneLoads a value from an operand into the Global Descriptor Table(GDT) register.Clocks                 SizeOperands         808x  286   386   486          Bytesmem64             -     11    11    11            5LIDT - Load Interrupt Descriptor Table (286+ privileged)Usage:  LIDT    srcModifies flags: NoneLoads a value from an operand into the Interrupt Descriptor Table(IDT) register.Clocks                 SizeOperands         808x  286   386   486          Bytesmem64             -     12    11    11            5LGS - Load Pointer Using GS (386+)Usage:  LGS     dest,srcModifies flags: NoneLoads 32-bit pointer from memory source to destination registerand GS.  The offset is placed in the destination register and thesegment is placed in GS.  To use this instruction the word at thelower memory address must contain the offset and the word at thehigher address must contain the segment.  This simplifies the loadingof far pointers from the stack and the interrupt vector table.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,mem           -     -     7     6            5-7reg,mem (PM)      -     -     22    12           5-7LLDT - Load Local Descriptor Table (286+ privileged)Usage:  LLDT    srcModifies flags: NoneLoads a value from an operand into the Local Descriptor TableRegister (LDTR).Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     17    20    11            3mem16             -     19    24    11            5LMSW - Load Machine Status Word (286+ privileged)Usage:  LMSW    srcModifies flags: NoneLoads the Machine Status Word (MSW) from data found at "src"Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     3     10    13            3mem16             -     6     13    13            5LOCK - Lock BusUsage:  LOCKLOCK: (386+ prefix)Modifies flags: NoneThis instruction is a prefix that causes the CPU assert bus locksignal during the execution of the next instruction.  Used toavoid two processors from updating the same data location.  The286 always asserts lock during an XCHG with memory operands.  Thisshould only be used to lock the bus prior to XCHG, MOV, IN andOUT instructions.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     0     0     1             1LODS - Load String (Byte, Word or Double)Usage:  LODS    srcLODSBLODSWLODSD  (386+)Modifies flags: NoneTransfers string element addressed by DS:SI (even if an operand issupplied) to the accumulator.   SI is incremented based on the sizeof the operand or based on the instruction used.  If the DirectionFlag is set SI is decremented, if the Direction Flag is clear SIis incremented.  Use with REP prefixes.Clocks                 SizeOperands         808x  286   386   486          Bytessrc             12/16   5     5     5             1LOOP - Decrement CX and Loop if CX Not ZeroUsage:  LOOP    labelModifies flags: NoneDecrements CX by 1 and transfers control to "label" if CX is notZero.  The "label" operand must be within -128 or 127 bytes of theinstruction following the loop instructionClocks                 SizeOperands         808x  286   386   486          Byteslabel:  jump      18   8+m  11+m    6             2no jump    5    4     ?     2LOOPE/LOOPZ - Loop While Equal / Loop While ZeroUsage:  LOOPE   labelLOOPZ   labelModifies flags: NoneDecrements CX by 1 (without modifying the flags) and transferscontrol to "label" if CX != 0 and the Zero Flag is set.  The"label" operand must be within -128 or 127 bytes of the instructionfollowing the loop instruction.Clocks                 SizeOperands         808x  286   386   486          Byteslabel:  jump      18   8+m  11+m    9             2no jump    5    4     ?     6LOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not EqualUsage:  LOOPNZ  labelLOOPNE  labelModifies flags: NoneDecrements CX by 1 (without modifying the flags) and transferscontrol to "label" if CX != 0 and the Zero Flag is clear.  The"label" operand must be within -128 or 127 bytes of the instructionfollowing the loop instruction.Clocks                 SizeOperands         808x  286   386   486          Byteslabel:  jump      19   8+m  11+m    9             2no jump    5    4     ?     6LSL - Load Segment Limit (286+ protected)Usage:  LSL     dest,srcModifies flags: ZFLoads the segment limit of a selector into the destination registerif the selector is valid and visible at the current privilege level.If loading is successful the Zero Flag is set, otherwise it iscleared.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16,reg16       -     14  20/25   10            3reg32,reg32       -     -   20/25   10            3reg16,mem16       -     16  21/26   10            5reg32,mem32       -     -   21/26   10            5- 386 times are listed "byte granular" / "page granular"LSS - Load Pointer Using SS (386+)Usage:  LSS     dest,srcModifies flags: NoneLoads 32-bit pointer from memory source to destination registerand SS.  The offset is placed in the destination register and thesegment is placed in SS.  To use this instruction the word at thelower memory address must contain the offset and the word at thehigher address must contain the segment.  This simplifies the loadingof far pointers from the stack and the interrupt vector table.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,mem           -     -     7     6            5-7reg,mem (PM)      -     -     22    12           5-7LTR - Load Task Register (286+ privileged)Usage:  LTR     srcModifies flags: NoneLoads the current task register with the value specified in "src".Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     17    23    20            3mem16             -     19    27    20            5MOV - Move Byte or WordUsage:  MOV     dest,srcModifies flags: NoneCopies byte or word from the source operand to the destinationoperand.  If the destination is SS interrupts are disabled excepton early buggy 808x CPUs.  Some CPUs disable interrupts if thedestination is any of the segment registersClocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           2     2     2     1             2mem,reg          9+EA   3     2     1            2-4  (W88=13+EA)reg,mem          8+EA   5     4     1            2-4  (W88=12+EA)mem,immed       10+EA   3     2     1            3-6  (W88=14+EA)reg,immed         4     2     2     1            2-3mem,accum         10    3     2     1             3   (W88=14)accum,mem         10    5     4     1             3   (W88=14)segreg,reg16      2     2     2     3             2segreg,mem16     8+EA   5     5     9            2-4  (W88=12+EA)reg16,segreg      2     2     2     3             2mem16,segreg     9+EA   3     2     3            2-4  (W88=13+EA)reg32,CR0/CR2/CR3 -     -     6     4CR0,reg32         -     -     10    16CR2,reg32         -     -     4     4             3CR3,reg32         -     -     5     4             3reg32,DR0/DR1/DR2/DR3   -     22   10             3reg32,DR6/DR7     -     -     22   10             3DR0/DR1/DR2/DR3,reg32   -     22   11             3DR6/DR7,reg32     -     -     16   11             3reg32,TR6/TR7     -     -     12    4             3TR6/TR7,reg32     -     -     12    4             3reg32,TR3                           3TR3,reg32                           6- when the 386 special registers are used all operands are 32 bitsMOVS - Move String (Byte or Word)Usage:  MOVS    dest,srcMOVSBMOVSWMOVSD  (386+)Modifies flags: NoneCopies data from addressed by DS:SI (even if operands are given) tothe location ES:DI destination and updates SI and DI based on thesize of the operand or instruction used.  SI and DI are incrementedwhen the Direction Flag is cleared and decremented when the DirectionFlag is Set.  Use with REP prefixes.Clocks                 SizeOperands         808x  286   386   486          Bytesdest,src          18    5     7     7             1   (W88=26)MOVSX - Move with Sign Extend (386+)Usage:  MOVSX   dest,srcModifies flags: NoneCopies the value of the source operand to the destination registerwith the sign extended.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           -     -     3     3             3reg,mem           -     -     6     3            3-7MOVZX - Move with Zero Extend (386+)Usage:  MOVZX   dest,srcModifies flags: NoneCopies the value of the source operand to the destination registerwith the zeroes extended.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           -     -     3     3             3reg,mem           -     -     6     3            3-7MUL - Unsigned MultiplyUsage:  MUL     srcModifies flags: CF OF (AF,PF,SF,ZF undefined)Unsigned multiply of the accumulator by the source.  If "src" isa byte value, then AL is used as the other multiplicand and theresult is placed in AX.  If "src" is a word value, then AX ismultiplied by "src" and DX:AX receives the result.  If "src" isa double word value, then EAX is multiplied by "src" and EDX:EAXreceives the result.  The 386+ uses an early out algorithm whichmakes multiplying any size value in EAX as fast as in the 8 or 16bit registers.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8            70-77   13   9-14  13-18          2reg16          118-113  21   9-22  13-26          2reg32             -     -    9-38  13-42         2-4mem8        (76-83)+EA  16  12-17  13-18         2-4mem16     (124-139)+EA  24  12-25  13-26         2-4mem32             -     -   12-21  13-42         2-4NEG - Two's Complement NegationUsage:  NEG     destModifies flags: AF CF OF PF SF ZFSubtracts the destination from 0 and saves the 2s complement of"dest" back into "dest".Clocks                 SizeOperands         808x  286   386   486          Bytesreg               3     2     2     1             2mem             16+EA   7     6     3            2-4  (W88=24+EA)NOP - No Operation (90h)Usage:  NOPModifies flags: NoneThis is a do nothing instruction.  It results in occupation of bothspace and time and is most useful for patching code segments.(This is the original XCHG AL,AL instruction)Clocks                 SizeOperands         808x  286   386   486          Bytesnone              3     3     3     1             1NOT - One's Compliment Negation (Logical NOT)Usage:  NOT     destModifies flags: NoneInverts the bits of the "dest" operand forming the 1s complement.Clocks                 SizeOperands         808x  286   386   486          Bytesreg               3     2     2     1             2mem             16+EA   7     6     3            2-4  (W88=24+EA)OR - Inclusive Logical ORUsage:  OR      dest,srcModifies flags: CF OF PF SF ZF (AF undefined)Logical inclusive OR of the two operands returning the result inthe destination.  Any bit set in either operand will be set in thedestination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     7     3            2-4  (W88=24+EA)reg,mem          9+EA   7     6     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem8,immed8     17+EA   7     7     3            3-6mem16,immed16   25+EA   7     7     3            3-6accum,immed       4     3     2     1            2-3OUT - Output Data to PortUsage:  OUT     port,accumModifies flags: NoneTransfers byte in AL,word in AX or dword in EAX to the specifiedhardware port address.  If the port number is in the range of 0-255it can be specified as an immediate.  If greater than 255 then theport number must be specified in DX.  Since the PC only decodes 10bits of the port address, values over 1023 can only be decoded bythird party vendor equipment and also map to the port range 0-1023.Clocks                 SizeOperands         808x  286   386    486         Bytesimmed8,accum    10/14   3     10     16           2immed8,accum (PM) -     -    4/24 11/31/29        2DX,accum         8/12   3     11     16           1DX,accum (PM)     -     -    5/25 10/30/29        1- 386+ protected mode timings depend on privilege levels.first number is the timing when:    CPL ≤ IOPLsecond number is the timing when:   CPL > IOPLthird number is the timing when:    virtual mode on 486 processorOUTS - Output String to Port  (80188+)Usage:  OUTS    port,srcOUTSBOUTSWOUTSD   (386+)Modifies flags: NoneTransfers a byte, word or doubleword from "src" to the hardwareport specified in DX.  For instructions with no operands the "src"is located at DS:SI and SI is incremented or decremented by thesize of the operand or the size dictated by the instruction format.When the Direction Flag is set SI is decremented, when clear, SI isincremented.  If the port number is in the range of 0-255 it canbe specified as an immediate.  If greater than 255 then the portnumber must be specified in DX.  Since the PC only decodes 10 bitsof the port address, values over 1023 can only be decoded by thirdparty vendor equipment and also map to the port range 0-1023.Clocks                 SizeOperands         808x  286   386    486         Bytesport,src          -     5     14     17           1port,src (PM)     -     -    8/28 10/32/30        1- 386+ protected mode timings depend on privilege levels.first number is the timing when:    CPL ≤ IOPLsecond number is the timing when:   CPL > IOPLthird number is the timing when:    virtual mode on 486 processorPOP - Pop Word off StackUsage:  POP     destModifies flags: NoneTransfers word at the current stack top (SS:SP) to the destinationthen increments SP by two to point to the new stack top.  CS is nota valid destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             8     5     4     4             1reg32             4     -     -     4             1segreg            8     5     7     3             1mem16           17+EA   5     5     6            2-4mem32             5     -     -     6            2-4POPA/POPAD - Pop All Registers onto Stack  (80188+)Usage:  POPAPOPAD  (386+)Modifies flags: NonePops the top 8 words off the stack into the 8 general purpose 16/32bit registers.   Registers are popped in the following order: (E)DI,(E)SI, (E)BP, (E)SP, (E)DX, (E)CX and (E)AX.  The (E)SP value poppedfrom the stack is actually discarded.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              -     19    24    9             1POPF/POPFD - Pop Flags off StackUsage:  POPFPOPFD  (386+)Modifies flags: all flagsPops word/doubleword from stack into the Flags Register and thenincrements SP by 2 (for POPF) or 4 (for POPFD).Clocks                 SizeOperands         808x  286   386   486          Bytesnone             8/12   5     5     9             1  (W88=12)none  (PM)        -     -     5     6             1PUSH - Push Word onto StackUsage:  PUSH    srcPUSH    immed   (80188+ only)Modifies flags: NoneDecrements SP by the size of the operand (two or four, byte valuesare sign extended) and transfers one word from source to the stacktop (SS:SP).Clocks                 SizeOperands         808x  286   386   486          Bytesreg16           11/15   3     2     1             1reg32             -     -     2     1             1mem16           16+EA   5     5     4            2-4  (W88=24+EA)mem32             -     -     5     4            2-4segreg          10/14   3     2     3             1immed             -     3     2     1            2-3PUSHA/PUSHAD - Push All Registers onto Stack  (80188+)Usage:  PUSHAPUSHAD  (386+)Modifies flags: NonePushes all general purpose registers onto the stack in the followingorder: (E)AX, (E)CX, (E)DX, (E)BX, (E)SP, (E)BP, (E)SI, (E)DI.  Thevalue of SP is the value before the actual push of SP.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              -     19    24    11            1PUSHF/PUSHFD - Push Flags onto StackUsage:  PUSHFPUSHFD  (386+)Modifies flags: NoneTransfers the Flags Register onto the stack.  PUSHF saves a 16 bitvalue while PUSHFD saves a 32 bit value.Clocks                 SizeOperands         808x  286   386   486          Bytesnone            10/14   3     4     4             1none  (PM)        -     -     4     3             1RCL - Rotate Through Carry LeftUsage:  RCL     dest,countModifies flags: CF OF+-+     +---------------++-+|C|<+--+|7 <---------- 0|<-+|  +-+     +---------------+  |+-----------------------------+Rotates the bits in the destination to the left "count" times withall data pushed out the left side re-entering on the right.  TheCarry Flag holds the last bit rotated out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     9     3            2mem,1           15+EA   7     10    4           2-4  (W88=23+EA)reg,CL           8+4n  5+n    9    8-30          2mem,CL        20+EA+4n 8+n    10   9-31         2-4  (W88=28+EA+4n)reg,immed8        -    5+n     9   8-30          3mem,immed8        -    8+n    10   9-31         3-5RCR - Rotate Through Carry RightUsage:  RCR     dest,countModifies flags: CF OF+---------------+     +-++->|7 +---------> 0|+--->|C|+-+|  +---------------+     +-+  |+-----------------------------+Rotates the bits in the destination to the right "count" times withall data pushed out the right side re-entering on the left.  TheCarry Flag holds the last bit rotated out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     9     3            2mem,1           15+EA   7     10    4           2-4   (W88=23+EA)reg,CL           8+4n  5+n    9    8-30          2mem,CL        20+EA+4n 8+n    10   9-31         2-4   (W88=28+EA+4n)reg,immed8        -    5+n    9    8-30          3mem,immed8        -    8+n    10   9-31         3-5REP - Repeat String OperationUsage:  REPModifies flags: NoneRepeats execution of string instructions while CX != 0.  Aftereach string operation, CX is decremented and the Zero Flag istested.  The combination of a repeat prefix and a segment overrideon CPU's before the 386 may result in errors if an interrupt occursbefore CX=0.  The following code shows code that is susceptible tothis and how to avoid it:again:  rep movs  byte ptr ES:[DI],ES:[SI]   ; vulnerable instr.jcxz  next              ; continue if REP successfulloop  again             ; interrupt goofed countnext:Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2                   1REPE/REPZ - Repeat Equal / Repeat ZeroUsage:  REPEREPZModifies flags: NoneRepeats execution of string instructions while CX != 0 and the ZeroFlag is set.  CX is decremented and the Zero Flag tested aftereach string operation.   The combination of a repeat prefix and asegment override on processors other than the 386 may result inerrors if an interrupt occurs before CX=0.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2                   1REPNE/REPNZ - Repeat Not Equal / Repeat Not ZeroUsage:  REPNEREPNZModifies flags: NoneRepeats execution of string instructions while CX != 0 and the ZeroFlag is clear.   CX is decremented and the Zero Flag tested aftereach string operation.   The combination of a repeat prefix and asegment override on processors other than the 386 may result inerrors if an interrupt occurs before CX=0.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2                   1RET/RETF - Return From ProcedureUsage:  RET     nBytesRETF    nBytesRETN    nBytesModifies flags: NoneTransfers control from a procedure back to the instruction addresssaved on the stack.  "n bytes" is an optional number of bytes torelease.  Far returns pop the IP followed by the CS, while nearreturns pop only the IP register.Clocks                 SizeOperands         808x  286    386   486         Bytesretn            16/20  11+m  10+m    5            1retn immed      20/24  11+m  10+m    5            3retf            26/34  15+m  18+m    13           1retf (PM, same priv.)   -    32+m    18           1retf (PM, lesser priv.) -      68    33           1retf immed      25/33  15+m  18+m    14           3retf immed (PM, same priv.)  32+m    17           1retf immed (PM, lesser priv.)  68    33           1ROL - Rotate LeftUsage:  ROL     dest,countModifies flags: CF OF+-+     +---------------+|C|<++-+|7 <---------- 0|<-++-+  |  +---------------+  |+---------------------+Rotates the bits in the destination to the left "count" times withall data pushed out the left side re-entering on the right.  TheCarry Flag will contain the value of the last bit rotated out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     3     3             2mem,1           15+EA   7     7     4            2-4  (W88=23+EA)reg,CL           8+4n  5+n    3     3             2mem,CL        20+EA+4n 8+n    7     4            2-4  (W88=28+EA+4n)reg,immed8        -    5+n    3     2             3mem,immed8        -    8+n    7     4            3-5ROR - Rotate RightUsage:  ROR     dest,countModifies flags: CF OF+---------------+     +-++->|7 +---------> 0|+-+->|C||  +---------------+  |  +-++---------------------+Rotates the bits in the destination to the right "count" times withall data pushed out the right side re-entering on the left.  TheCarry Flag will contain the value of the last bit rotated out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     3     3             2mem,1           15+EA   7     7     4            2-4  (W88=23+EA)reg,CL           8+4n  5+n    3     3             2mem,CL        20+EA+4n 8+n    7     4            2-4  (W88=28+EA+4n)reg,immed8        -    5+n    3     2             3mem,immed8        -    8+n    7     4            3-5SAHF - Store AH Register into FLAGSUsage:  SAHFModifies flags: AF CF PF SF ZFTransfers bits 0-7 of AH into the Flags Register.  This includesAF, CF, PF, SF and ZF.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              4     2     3     2             1SAL/SHL - Shift Arithmetic Left / Shift Logical LeftUsage:  SAL     dest,countSHL     dest,countModifies flags: CF OF PF SF ZF (AF undefined)+-+     +---------------+     +-+|C|<---+|7 <---------- 0|<---+|0|+-+     +---------------+     +-+Shifts the destination left by "count" bits with zeroes shiftedin on right.  The Carry Flag contains the last bit shifted out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     3     3            2mem,1           15+EA   7     7     4           2-4  (W88=23+EA)reg,CL           8+4n  5+n    3     3            2mem,CL        20+EA+4n 8+n    7     4           2-4  (W88=28+EA+4n)reg,immed8        -    5+n    3     2            3mem,immed8        -    8+n    7     4           3-5SAR - Shift Arithmetic RightUsage:  SAR     dest,countModifies flags: CF OF PF SF ZF (AF undefined)+---------------+     +-++-+|7 ----------> 0|---+>|C||  +---------------+     +-++---^Shifts the destination right by "count" bits with the current signbit replicated in the leftmost bit.  The Carry Flag contains thelast bit shifted out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     3     3             2mem,1           15+EA   7     7     4            2-4  (W88=23+EA)reg,CL           8+4n  5+n    3     3             2mem,CL        20+EA+4n 8+n    7     4            2-4  (W88=28+EA+4n)reg,immed8        -    5+n    3     2             3mem,immed8        -    8+n    7     4            3-5SBB - Subtract with Borrow/CarryUsage:  SBB     dest,srcModifies flags: AF CF OF PF SF ZFSubtracts the source from the destination, and subtracts 1 extra ifthe Carry Flag is set.   Results are returned in "dest".Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     6     3            2-4  (W88=24+EA)reg,mem          9+EA   7     7     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       17+EA   7     7     3            3-6  (W88=25+EA)accum,immed       4     3     2     1            2-3SCAS - Scan String  (Byte, Word or Doubleword)Usage:  SCAS    stringSCASBSCASWSCASD   (386+)Modifies flags: AF CF OF PF SF ZFCompares value at ES:DI (even if operand is specified) from theaccumulator and sets the flags similar to a subtraction.  DI isincremented/decremented based on the instruction format (oroperand size) and the state of the Direction Flag.  Use with REPprefixes.Clocks                 SizeOperands         808x  286   386   486          Bytesstring            15    7     7     6             1  (W88=19)SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+)Usage:  SETAE   destSETNB   dest(unsigned, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Carry Flag is clearotherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+)Usage:  SETB    destSETNAE  dest(unsigned, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Carry Flag is setotherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+)Usage:  SETBE   destSETNA   dest(unsigned, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Carry Flag or the ZeroFlag is set, otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETE/SETZ - Set if Equal / Set if Zero (386+)Usage:  SETE    destSETZ    destModifies flags: noneSets the byte in the operand to 1 if the Zero Flag is set,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+)Usage:  SETNE   destSETNZ   destModifies flags: noneSets the byte in the operand to 1 if the Zero Flag is clear,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+)Usage:  SETL    destSETNGE  dest(signed, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Sign Flag is not equalto the Overflow Flag, otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+)Usage:  SETGE   destSETNL   dest(signed, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Sign Flag equals theOverflow Flag, otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+)Usage:  SETLE   destSETNG   dest(signed, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Zero Flag is set or theSign Flag is not equal to the Overflow Flag,  otherwise sets theoperand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+)Usage:  SETG    destSETNLE  dest(signed, 386+)Modifies flags: noneSets the byte in the operand to 1 if the Zero Flag is clear or theSign Flag equals to the Overflow Flag,  otherwise sets the operandto 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETS - Set if Signed (386+)Usage:  SETS    destModifies flags: noneSets the byte in the operand to 1 if the Sign Flag is set, otherwisesets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETNS - Set if Not Signed (386+)Usage:  SETNS   destModifies flags: noneSets the byte in the operand to 1 if the Sign Flag is clear,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETC - Set if Carry (386+)Usage:  SETC    destModifies flags: noneSets the byte in the operand to 1 if the Carry Flag is set,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETNC - Set if Not Carry (386+)Usage:  SETNC   destModifies flags: noneSets the byte in the operand to 1 if the Carry Flag is clear,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETO - Set if Overflow (386+)Usage:  SETO    destModifies flags: noneSets the byte in the operand to 1 if the Overflow Flag is set,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETNO - Set if Not Overflow (386+)Usage:  SETNO   destModifies flags: noneSets the byte in the operand to 1 if the Overflow Flag is clear,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETP/SETPE - Set if Parity / Set if Parity Even  (386+)Usage:  SETP    destSETPE   destModifies flags: noneSets the byte in the operand to 1 if the Parity Flag is set,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+)Usage:  SETNP   destSETPO   destModifies flags: noneSets the byte in the operand to 1 if the Parity Flag is clear,otherwise sets the operand to 0.Clocks                 SizeOperands         808x  286   386   486          Bytesreg8              -     -     4     3             3mem8              -     -     5     4             3SGDT - Store Global Descriptor Table (286+ privileged)Usage:  SGDT    destModifies flags: noneStores the Global Descriptor Table (GDT) Register into thespecified operand.Clocks                 SizeOperands         808x  286   386   486          Bytesmem64             -     11    9     10            5SIDT - Store Interrupt Descriptor Table (286+ privileged)Usage:  SIDT    destModifies flags: noneStores the Interrupt Descriptor Table (IDT) Register into thespecified operand.Clocks                 SizeOperands         808x  286   386   486          Bytesmem64             -     12    9     10            5SHL - Shift Logical LeftSee: SALSHR - Shift Logical RightUsage:  SHR     dest,countModifies flags: CF OF PF SF ZF (AF undefined)+-+     +---------------+     +-+|0|---+>|7 ----------> 0|---+>|C|+-+     +---------------+     +-+Shifts the destination right by "count" bits with zeroes shiftedin on the left.  The Carry Flag contains the last bit shifted out.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,1             2     2     3                   2mem,1           15+EA   7     7                  2-4   (W88=23+EA)reg,CL           8+4n  5+n    3                   2mem,CL        20+EA+4n 8+n    7                  2-4   (W88=28+EA+4n)reg,immed8        -    5+n    3                   3mem,immed8        -    8+n    7                  3-5SHLD/SHRD - Double Precision Shift (386+)Usage:  SHLD    dest,src,countSHRD    dest,src,countModifies flags: CF PF SF ZF (OF,AF undefined)SHLD shifts "dest" to the left "count" times and the bit positionsopened are filled with the most significant bits of "src".  SHRDshifts "dest" to the right "count" times and the bit positionsopened are filled with the least significant bits of the secondoperand.  Only the 5 lower bits of "count" are used.Clocks                  SizeOperands                808x  286   386   486           Bytesreg16,reg16,immed8       -     -     3     2              4reg32,reg32,immed8       -     -     3     2              4mem16,reg16,immed8       -     -     7     3              6mem32,reg32,immed8       -     -     7     3              6reg16,reg16,CL           -     -     3     3              3reg32,reg32,CL           -     -     3     3              3mem16,reg16,CL           -     -     7     4              5mem32,reg32,CL           -     -     7     4              5SLDT - Store Local Descriptor Table (286+ privileged)Usage:  SLDT    destModifies flags: noneStores the Local Descriptor Table (LDT) Register into thespecified operand.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     2     2     2             3mem16             -     2     2     3             5SMSW - Store Machine Status Word (286+ privileged)Usage:  SMSW    destModifies flags: noneStore Machine Status Word (MSW) into "dest".Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     2     10    2             3mem16             -     3     3     3             5STC - Set CarryUsage:  STCModifies flags: CFSets the Carry Flag to 1.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2     2             1STD - Set Direction FlagUsage:  STDModifies flags: DFSets the Direction Flag to 1 causing string instructions toauto-decrement SI and DI instead of auto-increment.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2     2             1STI - Set Interrupt Flag  (Enable Interrupts)Usage:  STIModifies flags: IFSets the Interrupt Flag to 1, which enables recognition of allhardware interrupts.  If an interrupt is generated by a hardwaredevice, an End of Interrupt (EOI) must also be issued to enableother hardware interrupts of the same or lower priority.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              2     2     2     5             1STOS - Store String  (Byte, Word or Doubleword)Usage:  STOS    destSTOSBSTOSWSTOSDModifies flags: NoneStores value in accumulator to location at ES:(E)DI (even if operandis given).  (E)DI is incremented/decremented based on the size ofthe operand (or instruction format) and the state of the DirectionFlag.   Use with REP prefixes.Clocks                 SizeOperands         808x  286   386   486          Bytesdest              11    3     4     5             1  (W88=15)STR - Store Task Register (286+ privileged)Usage:  STR     destModifies flags: NoneStores the current Task Register to the specified operand.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     2     2     2             3mem16             -     3     2     3             5SUB - SubtractUsage:  SUB     dest,srcModifies flags: AF CF OF PF SF ZFThe source is subtracted from the destination and the result isstored in the destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     6     3            2-4  (W88=24+EA)reg,mem          9+EA   7     7     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       17+EA   7     7     3            3-6  (W88=25+EA)accum,immed       4     3     2     1            2-3TEST - Test For Bit PatternUsage:  TEST    dest,srcModifies flags: CF OF PF SF ZF (AF undefined)Performs a logical AND of the two operands updating the flagsregister without saving the result.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     1     1             2reg,mem          9+EA   6     5     1            2-4  (W88=13+EA)mem,reg          9+EA   6     5     2            2-4  (W88=13+EA)reg,immed         5     3     2     1            3-4mem,immed       11+EA   6     5     2            3-6accum,immed       4     3     2     1            2-3VERR - Verify Read (286+ protected)Usage:  VERR    srcModifies flags: ZFVerifies the specified segment selector is valid and is readableat the current privilege level.  If the segment is readable,the Zero Flag is set, otherwise it is cleared.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     14    10    11            3mem16             -     16    11    11            5VERW - Verify Write (286+ protected)Usage:  VERW    srcModifies flags: ZFVerifies the specified segment selector is valid and is ratableat the current privilege level.  If the segment is writable,the Zero Flag is set, otherwise it is cleared.Clocks                 SizeOperands         808x  286   386   486          Bytesreg16             -     14    15    11            3mem16             -     16    16    11            5WAIT/FWAIT - Event WaitUsage:  WAITFWAITModifies flags: NoneCPU enters wait state until the coprocessor signals it has finishedits operation.  This instruction is used to prevent the CPU fromaccessing memory that may be temporarily in use by the coprocessor.WAIT and FWAIT are identical.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              4     3     6+   1-3            1WBINVD - Write-Back and Invalidate Cache (486+)Usage:  WBINVDModifies flags: NoneFlushes internal cache, then signals the external cache to writeback current data followed by a signal to flush the external cache.Clocks                 SizeOperands         808x  286   386   486          Bytesnone              -     -     -     5             2XCHG - ExchangeUsage:  XCHG    dest,srcModifies flags: NoneExchanges contents of source and destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           4     3     3     3             2mem,reg         17+EA   5     5     5            2-4  (W88=25+EA)reg,mem         17+EA   5     5     3            2-4  (W88=25+EA)accum,reg         3     3     3     3             1reg,accum         3     3     3     3             1XLAT/XLATB - TranslateUsage:  XLAT    translation-tableXLATB   (masm 5.x)Modifies flags: NoneReplaces the byte in AL with byte from a user table addressed byBX.  The original value of AL is the index into the translate table.The best way to discripe this is MOV AL,[BX+AL]Clocks                 SizeOperands         808x  286   386   486          Bytestable offset      11    5     5     4             1XOR - Exclusive ORUsage:  XOR     dest,srcModifies flags: CF OF PF SF ZF (AF undefined)Performs a bitwise exclusive OR of the operands and returnsthe result in the destination.Clocks                 SizeOperands         808x  286   386   486          Bytesreg,reg           3     2     2     1             2mem,reg         16+EA   7     6     3            2-4  (W88=24+EA)reg,mem          9+EA   7     7     2            2-4  (W88=13+EA)reg,immed         4     3     2     1            3-4mem,immed       17+EA   7     7     3            3-6  (W88=25+EA)accum,immed       4     3     2     1            2-3