Simulation models

Methods Models Tolerances SPICE2G6 ELDO APLAC

• Models for semiconductor components
  • MOS-transistors
  • Bipolar transistors
  • GaAs-active components
• Functional models

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Models for semiconductor components

In modeling semiconductor components the aim is to get as highsimilarity with the physical functionality as possible. This isimportant especially in models for integrated circuits, because thenthere is at least some kind of similarity between the model parametersand the process steps. For example, the TOX-parameter that representsthe thickness of the gate oxide of a MOS-model can be assumed to be thesame for both NMOS and PMOS transistors in CMOS-processes. The reasonfor this is that the oxide is increased at the same time for both N andP type’s transistors. This kind of correspondence between theparameters won’t occur, if the MOS-model is built up empirically withthe minimum amount of parameters.

MOS-transistors

There are three MOS-modelsin SPICE2G6: LEVEL 1, 2 and 3. From these LEVEL 1 is a coarse model forfirst experiments (= the normal manual count formulas of thetextbooks). Another purpose of use is to ease the simulation of biggercircuits with a lighter model.

LEVEL 2 is in quite wide use, but its weakness is the passing fromlinear area to saturation area. In this model the linear and thesaturation area have only been forced to join at the boundary of theregions of operation. This means that the i_DS/v_DS-graph hasdiscontinuity of derivativeat the transition point, which can cause problems of convergence in the simulation. However, the biggest problem is that at the boundary of saturation the model differs very clearly from the operating characteristics of an actual transistor.This is why that area must be avoided. To do that, the transistors mustbe biased in such a way that there is sufficient margin of safetybetween the regions of operation in all operating conditions.Alternatively, you can learn to live with the fact that the simulationsdon’t correspond with the reality and hope that the circuit will workanyway.

This transition point has been empirically enhanced in the model LEVEL3. Thus more realistic results of simulation are in prospect even atthe boundary of saturation. The most accurate model in common use(SPICE3, PSPICE, HSPICE) is the BSIM-model (Berkley Short-channel IGFETModel), which also models the weak inversion logically. Unfortunatelythere have so far been 3 different main versions (not to mention thesub-versions) of BSIM-models and all the versions are naturallyincompatible with each other. Another public domain –type model is MM9 developed by Philips. It models MOS-transistor quite equally withBSIM3V3, even at the channel length of half a micron.

Gate resistance

When MOS-models were developed for SPICE-simulator, all theMOS-transistors had metal gates. Because the conductibility of metalsis something totally else than the conductibility of semiconductors,the gate isn’t assumed to be resistive in the MOS-models. At the moment(almost) all CMOS-processes use polysilicon gate, which usually has thesheet resistance of tens of ohms. In addition the channel length keepsshortening, so in high frequencies it’s best to find out for how widetransistors the modeling can been made. The fastest transistor from thegate resistance’s point of view consists of several transistors thathave the minimum width. However, in the latest MOS-processes, asilicide layer is grown over the polysilicon layer of the gate. Itreduces the sheet resistance of the gate to a tenth.

Diode capacitances

If you also want to pay attention to the junction capacitances in the substrate, alias CBS and CDB (the default value is 0!), you’ll have to type the areas (AD and AS) and the perimeters (PD and PS) of the drain and the source to theSPICE-component linein addition to W and L. Because this unfortunately means long andlaborious component lines, there are additional parameters in somesimulators to ease this. Unfortunately these practices differ fromsimulator to another. The advantage of these meticulous parameters isthat the right geometries can be extracted from the finished layout andthe functioning can be checked with a more accurate simulation.

In Hspice, you can choose different methods for calculating the areasof drain and source (ACM-parameters in the model). When you choose themethod to be ACM=2, the areas can be calculated by using the parameterHDIF. It is the distance from the edge of the gate to the middle of thedrain/source-contact (can also be found in APLAC). This way the area iscalculated right for a single finger transistor. To calculate the areafor transistors that have more than one finger, you’ll have to eitherdecrease the “effective” HDIF-parameter or once again write manuallyAD, AS, PD and PS.

The alternative is to use the method ACM=3. In this methodevery finger is calculated to be a transistor (and they are placed intheir own sub-circuits) and the GEO-parameter is used to tell thesimulator if either of the ends or a middle element is in question.This way all the capacitances and leakage currents are calculatedcorrectly.

Drain and source resistance

The resistance of the diffusions is usually presented withthe sheet resistance of the diffusion, alias the RSH-parameter. As youcan guess, there is just one square by default.For a wide transistor this resistance can be defined correctly bytyping the NRD and NRS parameters after the AD, AS; PD and PSparameters. You can also use ACM=2 and HDIF parameters like above.Luckily the effect of too small source-resistance (source degeneration)only appears with the currents of the magnitude of milliampere.

Bipolar transistor

SPICE-modelsof bipolar transistor are either Bummel-Poon or Ebers-Moll models. Thebase for bipolar transistor’s SPICE-model is the analysis of the chargeof Gummel and Poon’s base area, which is simplified in the active areato Ebers-Moll –model constructed of two successive pn-diodes.

BJT has four different regions of operation: Normal active region,where the base emitter –diode (BE) is in the conducting directioninverse active region, where the collector base diode is in theconducting direction; saturation region, where both are in theconducting direction; and cut-off region, where both are in reversedirection. Basically the SPICE-model covers all the regions, but theparameters are often reliable only in the active region, e.g. thefunctioning of the inverse region may be too optimistic. So payattention to the design…

Gummel-Poon’s model gives the current amplification’s dependency on thecollector current in the right direction, which the Eber-Moll –modeldoesn’t do. Instead the model doesn’t understand breakdown voltage orthe so-called quasi-saturation (base-widening).

Series resistors have been added for the emitter and the collector ofthe base of SPICE’s GP-model. Especially the series resistor of thebase, RB, is important, because it determines the high frequency andnoise characteristics, among others. RB can be programmed to depend onthe operating point, but the model is still inaccurate. Also definingthe parameters is hard, because the emitter resistor, RE, and the baseresistor, RB, can’t be separated.

In SPICE’s basic BJT-model it’s possible to take account forthe most important temperature dependencies, but the quasi-saturationor the breakdown voltage can’t be programmed. In this respect there aremore developed transistor models in many simulation programs, e.g.HSPICE’s BJT-model is an expanded Gummel-Poon –model in which thequasi-saturation (LEVEL=2) and different models for lateral- andvertical transistors (SUBS-parameter) have been added.

The frequency characteristics of a bipolar transistor are defined bythe transit time of the carriers, TF. Its inverse value is the unitshort-circuit current amplification’s cut-off frequency, fT. Theinternal cut-off frequency fT is bigger than the measurable cut-offfrequency, because the junction capacitances and the resistors of thejunction cause more delay. In high frequencies the model transforms todispersive because of the pinch effect and other additional phenomena,so the model that works nicely with direct current gives no highfrequency characteristics. The available models are usually fitted intostatic characteristic curves and into low frequency capacitancemeasurements, so you must enhance them to the RF-design yourself.

In APLAC there’s a new and more accurate MEXTRAM-model, inwhich the transistor’s connection to substrate, among others, has beentaken into account. Some leading electronic companies have togetherpublished the so-called VBIC95-model, in which this matter has beentaken into account and which is simplified directly into SPICE’sGP-model. This model is expected to be the new BJT-model standardespecially for RF and analog design.

Literature:

P. Antognetti, G. Massobrio,"Semiconductor Device Modeling with SPICE",McGraw Hill, 1988

C. McAndrew et al. VBIC95: An improved Vertical, IC Bipolar Transistor Model, Proc IEEEBCTM 1995

M. Lähepelto, M. Valtonen, "MEXTRAM 503 BJT Model in APLAC", TKK Rap. CT-26,Nov. 1995

GaAs-active components

GaAs-componentsdon’t have a model in SPICE2G6 at all. On the other hand, thesecomponents have mostly been used in simulators specified in microwaveregion, such as MDS-simulator. In addition the output conductance ofMESFET depends on frequency, so there isn’t much correlation betweensmall-signal models and static I/V-curves. The GaAs also conducts heatmore poorly than silicon, so the transistor warms up quite much fromits own current. Likewise, a bigger transistor is warmer in the middlethan at the edges, so one model is suitable for only one transistorgeometry. This warming-up also complicates transistor modeling: theI/V-curves must be measured in short bursts if you want to get at leastsome kind of high-level signal parameters (and not many bother to dothis). For these reasons the designer needs to have lots of luckbesides skills when using MESFETs.

When using heterojunction bipolar transistor (HBT) the models equalfairly well the ones of silicon bipolar transistor, so the models workwith both small and high-level signals.

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Functional models

The ensembles of bigger circuits, such as operational amplifiers, areusually modeled with sub-circuit in which the actual transistor-levelimplementation is simplified by using controlled sources and a modelthat is simplified from semiconductors (BJT: Ebers-Moll, MOS: LEVEL 1etc.). In that case, all the features haven’t been taken into account,e.g. the power consumption of the circuit won’t get described with thiskind of model.

SPICE2G6 can model non-linearity withpolynomial controlled sources and withpolynomically non-linear coils and capacitors.Hence, if you want to make SPICE-compatible functional model of thecircuit, you’ll need to describe the non-linearities with thesepolynomial non-linearities or use diodes to cut the signals. With thelater SPICE-versions you can use more common non-linear functions withcontrolled sources to define the more difficult non-linear functions.HSPICE has addednew functions as the functions of the controlled sources, logical functions among others.

Thelater simulators can also model non-linear activity with piecewisenon-linear controlled source. In this case the measured data candirectly be transferred to the functional model. Unfortunately thiskind of model gives rather inaccurate small-signal characteristics,because the derivatives are discontinuous. The simulators aim to roundtheir piecewise models with different interpolation algorithms, forexample. However, there isn’t a fail-safe way to round the functions sothat the result would also decrease the error instead of increasing it.

A few examples will clear what’s going on.