怎样实现TVS管的阻抗匹配

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HDMI compliant ESD/CDE protection for real world video circuits


High Definition Multimedia Interface (HDMI) is an uncompressed, all-digital audio/video interface. It provides a high speed interface between audio/video source devices, such as DVD players, and sink devices, such as digital displays. Current HDMI silicon is capable of transmitting digital signals up to 1.65Gbps. The HDMI plug is an external port which is exposed to constant transient threats, either directly from a user or from hot plugging a charged cable. The internal on-chip ESD protection is not enough to protect the graphic chip from becoming damaged. In order to ensure the functionality of this port, consumer electronics manufacturers require HDMI ports to be ESD hardened, often to the worldwide accepted ESD standard of IEC61000-4-2. Additional external protection is required to meet this stringent standard. Designers are faced with the challenges of hardening HDMI ports to the ESD immunity requirements of IEC61000-4-2, while maintaining signal integrity and impedance requirements per the HDMI Compliance Test Specification (CTS).

ESD/CDE Basics
ESD may be defined as the transfer of electrostatic charge between two bodies with different electrostatic potentials. This sudden discharge may be caused by direct contact or induced by an electrostatic field. Although it is not common for ESD to result in any harm to the human body, ESD may be very damaging to sensitive electronic devices. HDMI graphic chips are manufactured on silicon with very small geometries which are extremely sensitive to electrostatic discharge (ESD). Most of these chips will have some ESD protection integrated on the silicon; however, it is meant to only protect the devices in a controlled manufacturing environment. In the real world, interfaces like HDMI will experience severe ESD due to constant exposure to a user. These more severe levels are defined by the IEC 61000-4-2 standard. It is quite common for a person to develop a voltage in excess of 15kV from just walking across carpeted flooring. This level of ESD can severely damage or destroy ICs.


Table 1: IEC 61000-4-2 Test Levels

The IEC 61000-4-2 standard closely emulates an ESD event from the human body. Thus, this test method is referred to as the Human Body Model (HBM). This comprehensive ESD standard provides its user with test methods, environment, and test levels. Table 1 summarizes the four test levels of IEC 61000-4-2. Consumer electronics would typically be tested to level 4 of the IEC 61000-4-2 specifications; 8 kV contact and 15 kV air ESD. The waveform specified by the standard is illustrated in Figure 1. It has a risetime of < 1 ns and a decay time to 50% of the maximum peak current in 60 ns. Although the duration of the ESD pulse is short, its high voltage and current magnitudes are destructive to sensitive ICs.


Figure 1: ESD Waveform per IEC 61000-4-2

Another common type of electrostatic discharge is known as a cable discharge event (CDE). CDE commonly occurs when a DVI/HDMI cable becomes charged and is subsequently discharged into the circuit when the cable is plugged into its receptacle. A cable can become charged simply by pulling it out of its packaging. It can also become charged when a user transfers charge to the cable. A standard to define CDE and its test methods has yet to be established, but its energy levels are typically lower than that of the IEC 61000-4-2 Level 4. Therefore, most manufacturers deem it sufficient to test to the IEC specification.

Types of Protection
Providing effective ESD protection for HDMI ports is challenging. ESD protection devices that can handle the high surge levels defined by IEC61000-4-2 inherently have high capacitance due to the active area required to handle the high surge levels. Capacitive loading on the high speed video signals will result in signal degradation. ESD protection devices utilize various methods and technologies to lower the capacitance. Care must be taken in selecting an ESD device because the qualities of some protection devices are compromised in order to reduce its capacitive loading. Frequently, the clamping voltage of the protection device (the voltage at which the protected IC will see) is significantly increased as the capacitance of the protection device is lowered. This inadequate protection scheme will provide a false sense of security, making the protected IC vulnerable to latent failures where the system will degrade over time or intermittently operate improperly.

Traditional methods for protecting high speed interfaces include devices such as steering diodes and polymers devices. However, these types of protection devices are not optimum for HDMI protection. Conventional diodes are not designed to handle the high energy of the ESD pulse defined by the IEC61000-4-2. Polymer devices have very low capacitance; however, its turn on voltage is not dependable and is often greater than 1kV. This means the protected IC will be stressed by a minimum of a 1kV before the polymer even reacts to the incoming surge. HDMI manufacturers are now moving towards the more befitting transient voltage suppression (TVS) diodes as protection solutions. Unfortunately, not all TVS diodes perform the same. Important parameters to consider when choosing a TVS are its surge capabilities and low clamping voltage.
Maintaining HDMI CTS Impedance Specification
In order to maintain compatibility between HDMI products, all devices must comply with the requirements defined in the HDMI CTS. In an HDMI application, high speed signals are transmitted over three differential data pairs and one clock pair. These differential pairs are transmission lines with a controlled differential impedance of 100-ohms to maintain signal integrity. The HDMI CTS requires all HDMI sink devices to maintain the differential impedance of the high speed lines at 100-ohms 15%. This requirement is tested using a Time Domain Reflectometry (TDR) method that utilizes a pulse with a risetime of <=200ps. As the risetime becomes faster, imperfections (added capacitance or inductance) on the lines will have a larger affect on the differential line impedance. Although this impedance requirement is not required on the source devices, it is wise to maintain this specification because impedance changes on the high speed differential pair can cause signal degradation. This degradation will show up as a failure during the source device Eye Pattern Testing (EPT).

The capacitive load of an effective ESD protection device will cause a drop in the impedance of the differential pair that can result in a TDR failure or an EPT failure. Technology exists today for reducing the capacitance of an ESD protection device to less than 1pF without compromising the ESD surge capability. However, a capacitive loading of 1pF or less can still cause the impedance of the differential transmission lines to drop below the HDMI CTS level. Fortunately, this low level of capacitance can be compensated by PCB board layout methods. Thus, while it is important to choose the proper ESD protection device, it is equally important to properly compensate for the added capacitance in order to maintain in the impedance requirements per the HDMI CTS.

Theory of Capacitance Compensation
Testing has shown that a device with capacitance as low as 1pF can cause the impedance of the transmission lines to drop out of the minimum 85-ohm requirement of the HDMI CTS. There are a few ways to compensate for the capacitance loading of the ESD protection device and still stay within the HDMI impedance specification. One method is to use trace impedance on the PCB to compensate for the added capacitive loading. The other method is to cancel the capacitive loading by placing it as close to an existing inductive load.


Figure 2: Compensation of C(TVS) with trace length

The idea behind compensating for the added capacitance is best described by Dr. Howard Johnson’s "Potholes" analogy. The idea is to reduce the effect of the pothole by filling it with a rock that is approximately the size of the pothole. The results may not completely negate the effects; however it can be reduced to a tolerable amount. Figure 2 shows a transmission line with the added capacitance of the protection device labeled as C(TVS). Equation 1 and 2 can be used as a good means of determining if it is possible to compensate for the additional capacitance presented by the added protection component. Note that the equations are for common mode impedance while the HDMI application specifies the differential impedance of a transmission line pair. It is common, for example, to design Z0 to be 50-ohms in order to achieve the 100-ohm differential impedance HDMI requirement. To determine the actual dimensions of traces, dielectrics thickness, trace spacing, etc., the PCB layout software will need to include a controlled impedance calculator add-on option. However, a designer should still refer to the PCB manufacturer’s software and calculations, because they may have their own design rules, tolerances and constraints.


Equation 1


Equation 2

  • Z0 is the impedance surrounding transmission line
  • k defines the unloaded impedance of the adjusted segment
  • Z1 is the impedance needed to compensate for the added C(TVS)
  • is the effective delay of the adjusted segment which is 180ps for FR4
  • T is the length of the adjusted segment and will be given in inches if T is given in ps and C(TVS)in pF


Test Results and Recommendations
In order to perform an empirical evaluation of these methods, measurements were taken on several evaluation boards with varying trace layouts and device configurations. The following section will show results for PCB board layout compensation method. The results and recommendation of using an existing inductive load method can be found in Semtech application note SI05-03. The PCB board layout compensation method was evaluated at different PCB layer counts because the effects of the transmission lines vary with layer count. Boards with two, four, and six layers were evaluated. The recommended PCB board compensation for only the four layer board is given in the following section. Recommendations for two and six layer boards can also be obtained in Semtech application note SI05-03.

The protection device used in the evaluation is the Semtech RClamp0514M. The RClamp0514M was designed by Semtech with high speed signal integrity in mind. With the combination of low capacitance and low clamping voltages, the Semtech RClamp0514M is a dependable ESD protection solution for HDMI source and sink applications. The Semtech RClamp0514M displays a maximum differential capacitance value of 0.9pF on the lines. Because this capacitive loading can still cause the differential pair to drop out of the HDMI impedance specification, some board compensation is required.



Table 2: HDMI MSOP10-L Rev E four layer evaluation board layout parameters

The "HDMI MSOP-10L Rev E" is a four layer evaluation board designed to compensate for the capacitive loading of the Semtech RClamp0514M in order to keep the transmission lines within the HDMI CTS TDR requirement. It was determined that a 140-ohm differential impedance for 0.1575 inches before and after the RClamp0514M would be sufficient to compensate for the added capacitance. The trace is reverted back to the normal 100-ohm design beyond 0.1575 inches of the Semtech RClamo0514M. This is illustrated in Figure 3. The board and trace parameters are summarized in Table 2.


Figure 3: Impedance Design Guidelines for four layer board

The TDR waveform and data for the two, four, and six layer boards are shown in Figure 4, 5, and 6 respectively.





Figure 4: High and Low Impedance of Semtech RClamp0514M mounted on the HDMI MSOP-10L Rev G Two Layer Evaluation Board






Figure 5: High and Low Impedance of Semtech RClamp0514M mounted on the HDMI MSOP-10L Rev E Four Layer Evaluation Board



Figure 6: High and Low Impedance of Semtech RClamp0514M mounted on the Trident HDMI Six Layer Evaluation Board

The TDR measurements displayed demonstrate the impedance of the transmission lines with a protection device. As shown, the impedance values are well within the HDMI CTS. The two layer board exhibits a high of 108-ohms and a low of 96-ohms. The four layer board exhibits a high of 108-ohms and a low of 101-ohms, while the six layer board exhibits a high of 104-ohms and a low of 90-ohms. Note, the HDMI chip on the six layer evaluation board was not terminated. The sharp rise in impedance denotes the open terminal of the evaluation board.

Conclusion
Designers of HDMI systems are faced with the difficult task of providing reliable ESD protection while maintaining signal integrity. Proper selection of added external protection device is crucial. The device must exhibit very low capacitance while keeping the clamping voltage at a minimum to maintain the quality and reliability of the protection scheme. This will ensure that the HDMI graphic chip will not be damaged during an ESD transient. In addition to device selection, it is important to take steps to design proper compensation for the added capacitance in order to maintain within the TDR levels and eye pattern requirements of the HDMI CTS. Two successful methods of compensations are using PCB board layout trace designs or using an existing inductive component to cancel the added capacitive loading. ESD protection devices such as the Semtech RClamp0514M have been successfully implemented, using both compensation methods to meet the HDMI CTS requirements.